1. Field of the Invention
The present invention relates to a CMOS image sensor, and more particularly, to a CMOS image sensor having two analog signal processors (ASP) for high-speed operation.
2. Description of the Prior Art
Image sensors, which can convert optical images to electrical signals, are classified into complementary metal oxide semiconductor (CMOS) image sensors and charge-coupled device (CCD) image sensors. For CCD image sensors, electric charges are transmitted to and stored in capacitors arranged close together. For CMOS image sensors, pixel arrays are formed in a CMOS integrated circuit process, and electric charges are detected sequentially by switch operations. The CMOS image sensor has a benefit of low power consumption, and is generally used in mobile communications devices.
Please refer to FIG. 1. FIG. 1 is a diagram of a CMOS image sensor according to the prior art. The CMOS image sensor includes a pixel array 11 having red pixels (R), green pixels (G), and blue pixels (B) arranged in a matrix. A plurality of correlation double sampling (CDS) circuits 12 is arranged under the pixel array 11, and each CDS circuit is coupled to a corresponding column of the pixel array 11. An analog signal processor (ASP) 13 is arranged on a side of the pixel array 11 for processing output signals of the plurality of CDS circuits 12.
The CDS circuit 12 samples the reset signal and the data signal from each pixel, and transmits the signals to the ASP 13. Then, the ASP 13 calculates the difference of the reset signal and the data signal, and amplifies the signal to obtain image data of the object. In the process of reading the image data, one row of the pixel array 11 transmits the image data to the corresponding CDS circuits 12. Finally, the output data of the CDS circuit 12 controlled by the driver 14 is transmitted sequentially to the ASP 13.
As mentioned above, in the CMOS image sensor according to the prior art, when the one row of the pixel array is selected, the reset signals and the data signals of the pixels of the row are stored in the corresponding CDS circuits, and then the data of the corresponding CDS circuits controlled by the driver is transmitted sequentially to the ASP.
When the pixel array has over a million pixels, the number of CDS circuits increases with the number of pixels in each row. Since the bus for transmitting the data to the ASP is coupled to a large number of CDS circuits, the parasitic impedances of the bus are increased. Thus, the CMOS image sensor cannot operate at a high speed. For high-speed operation, the CMOS image sensor has to be improved, especially the ASP of the CMOS image sensor.